[Cloud] Introduction to Operating Systems

Contents

1. The concept of a process 

2. Virtual Memory 

3. User/Kernel Mode 

4. Tap Handling 

5. Segmentation 

6. I/O Subsystem 

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1. The concept of a process

 

wikipedia / lecture note (Process Memory Layout)

• Process
  • A process is the instance of a computer program that is being executed one or many threads, which the smallest sequence of programmed instructions.
  • For example, when writing a C program, you might use the compiler to turn source code into an executable(or binary). And you might run the new executable file that is a file in a machine language for a physical CPU.
• Process Memory Layout
  • Each running program has its own memory layout, separated from other programs. When the program runs, the OS assigns it a virtual address space. The layout consists of a lot of segments, including: 
    
    • Executable code: Stores the machine code instructions to be executed by the processor.
    • Static data: Stores statically initialized global and static variables to be used by the process.(uninitialized variables are stored in a seperate area called the BSS (Block Started by Symbol) segment.)
    • Heap: Dynamic memory for programmer to allocate (e.g., malloc() or new)
    • Stack: Stores local variables such as return address, procedure arguments, temporarily saved registers or locally allocated variables. (It operates on a LIFO priciple.)

 

lecture note (Context Switch)

• CPU Registers
  
  • CPU registers are used to store and manipulate data during the execution of instructions. (e.g., PC, General-Purpose Registers, SP..) CPU registers collectively represent the CPU context.
    • 1) When a process is running, the CPU executes instructions sequentially from the code/data segment. The Program Counter (PC) points to the address of the instruction being executed. (e.g., EIP (x86), RIP (x64))
    • 2) The CPU fetches, decodes, and executes instrunctions from the address pointed to by the PC. (e.g., RAX, RBX, RCX, RDX, ... (x64))
    • 3) The CPU uses General-Purpose Registers to store data required for operations.
    • 4) After an operation, the Stack Pointer (SP) points to the top address of the stack, which is used for storing data in memory.
• Context Switching
  • In a multitasking operating system, multiple processes or threads can run concurrently. However, the CPU can only execute instructions from a single process at any given time. This limitation necessitates the need for context switching.
  • Context Switching refers to the process of changing focus or shifting attention from one task or activity to another.
    • The OS saves the current state of the executing process or thread, including its PC, SP, and other relevant registers. It then loads the saved state of the next process or thread that needs to be executed.
    • The OS temporarily stores data structures of the current process in a Process Control Block (PCB).

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2. Virtual Memory

Virtual Memory is virtual or logical address that allocated to a process's memory for the CPU to reference. It is not a physical address that includes actual instruction or data and typically starts at address 0 for convenience. 

• Physical Memory, also known as RAM, is the hardware component that stores data and instructions that can be accessed directly by the processor.
• The CPU requires Virtual Memory to access cade and data segements efficiently. On the other hand, hardware components such as RAM rely on Physical Memory to fetch and store data, translating Virtual Memory into Physical Memory when needed.
• Virtual Memory enalbes the system to use more memory than physical memory by creating a virtual address space that maps to the physical address space using a mechanism called paging
  • Paging is the process of dividing the virtual and physical memory into fixed-size units called pages, typically 4KB per page.

 

lecture note (virtual and physical address spcaes)

1) Fetch address 5KB (Virtual Address Space): When the CPU attempts to access the Virtual address at 5KB, the address is translated into the corresponding physical address (e.g., address Y) through the page table. This translation allows the CPU to fetch the data stored in physical memory.

2) Fetch address Y + 1KB (Physical Address Space): When accessing 5KB in the virtual address space, the page offset is calculated relative to the second page.

 

lecture note (address translation with paging)

The page table stores the physical page numbers corresponding to the logical page numbers. When the OS allocates memory to a process, it createsa a page table, and the MMU is used for address translation.

 

lecture note (page table lookup or walking)

• The MMU (Memory Management Unit) references the page table and translates virtual addresses into physical addresses. The MMU uses the CR3 register for memory translation, storing the position of the page table for the currently executing process. (The CR3 register is reset during context switching)
• Recently translated addresses are stored in the TLB cache within the MMU.
  • iTLB (for instruction)
  • L1 dTLB, L2 dTLB (for data)

A Hierarchical(Multi-level) Page Table is an architecture designed for efficient management of large memory spaces. It divides the page table into multiple levels, with each level poiting to the next, ultimately mapping virtual pages to physical pages through PTEs (Pate Table Entries). The page table is stored in memory as smaller chunks to reduce memory overhead.

 

lecture note (demand page)

A Page fault occurs when a program attempts to access data or code that is in its address space but is not currently located in the system RAM.

• A page fault is a critical event in which a program try to attempts to access data or code that is not currently available in the physical memory (main memory).

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3. User/Kernel Mode

 

lecture note (privilege rings)

 

 

 

 

 

4. Trap Handling

 

lecture note (Trap Handling in x86)

 

5. Segmentation

lecture note

 

 

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Reference

https://d3s.mff.cuni.cz/files/teaching/nswi004/text/ch03s02s01.html

3.2.1. Process Memory Layout

 

https://courses.grainger.illinois.edu/cs225/fa2023/resources/stack-heap/

CS 225 | Stack and Heap Memory

 

https://www.totalphase.com/blog/2023/05/what-is-register-in-cpu-how-does-it-work/?srsltid=AfmBOoowTVJW5VvwrKudDPYEDa53Z_iWbSR_zaYT_xAOoasEFjqZIE8U

What is a Register in a CPU and How Does it Work?

 

https://startup-house.com/glossary/context-switching

Context Switching Demystified

 

https://www.linkedin.com/advice/0/what-difference-between-virtual-memory-physical-7ar3f

What is the difference between virtual memory and physical memory?

 

https://www.geeksforgeeks.org/page-fault-handling-in-operating-system/

Page Fault Handling in Operating System - GeeksforGeeks